Many DSP chips have distinct memory arrays for storing instructions and data separately, particularly when the instructions are of a different word width than the data. Other DSP chips utilize a single memory module having separate, permanently assigned regions for instruction and data words. Further, if the chip is adapted to operate on data words of several possible widths, the data region of the memory is further broken down into separate regions for each possible word width.
A drawback inherent to either of these designs is that a significant portion of memory space is typically wasted because the amount of memory assigned for storing each different word width must be adequate in size to accommodate a large variety of uses and programs, whether it be a separate memory module or an assigned portion of a single memory module. However, many uses or programs may utilize only a small portion of the memory dedicated to a particular word width. For instance, if a particular use of the DSP chip calls for a very simple program requiring only a small portion of the instruction memory, the remainder of the instruction memory is wasted. The same situation can apply to the various data regions of the memory. For instance, a particular use may require more 32-bit data memory space than is available, while requiring almost none of the 48-bit data memory space. In such situations, the particular chip cannot be used because of a lack of appropriate memory space, despite large amounts of free 48-bit data memory space.
Storing both 32 and 16-bit data typically does not present a problem. It is a well known technique to store two 16-bit words consecutively in a 32-bit wide memory space. However, that solution cannot be applied with respect to 48-bit data in the same memory space.
Accordingly, it is an object of the present invention to provide an improved memory accessing method and apparatus.
It is a further object of the present invention to provide a memory addressing method and apparatus in which the amount of memory dedicated to storing words of a particular width is adaptable.
It is yet another object of the present invention to provide an improved memory addressing method and apparatus.